1. Field of the Invention
The present invention relates to a semiconductor device including a means for preventing a circuit from being damaged by application of unexpected high voltage due to electrostatic discharge or the like. Note that “semiconductor device” in this specification indicates all devices that can operate by utilizing semiconductor characteristics. For example, a display device, an imaging device, a memory device, an arithmetic device, and electronic devices using such devices are all semiconductor devices.
2. Description of the Related Art
In a semiconductor circuit used in a semiconductor device, a semiconductor element, an electrode, or the like could be damaged by electrostatic discharge (hereinafter referred to as “ESD”). As a measure to prevent damage of a semiconductor circuit due to ESD, a protection circuit is connected to a semiconductor circuit in many cases. A protection circuit refers to a circuit for preventing overvoltage applied to a terminal, a wiring, or the like from being supplied to a semiconductor circuit. As typical examples of an element used in the protection circuit, there are a resistor, a diode, a transistor, and a capacitor.
Further, in the case where the protection circuit is provided, even when noise as well as a signal and power supply voltage is input to a wiring or the like, a malfunction of a semiconductor circuit in a later stage due to the noise can be prevented and deterioration or damage of the semiconductor element due to the noise can be prevented.
For example, Patent Document 1 discloses a technique in which a protection circuit including a resistor and a diode is connected between a semiconductor circuit and a connection terminal in order to smooth a surge current generated due to ESD and secure a discharge path of the surge current, whereby inflow of the surge current into the semiconductor circuit is prevented.
Further, Patent Document 2 discloses a technique of connecting a protection circuit in which a MOS transistor whose source and gate are short-circuited and a MOS transistor whose gate and drain are short-circuited are connected in series between a scan electrode of a display device and a conductive line provided in the periphery of a display portion.